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[VHDL-FPGA-Verilog] RISC8.ZIP

Description: 简单的一个8位RISC，Verilog HDL代码,类型为pic16c57-a simple eight RISC, Verilog HDL code, the type of pic16c57
Platform: | Size: 80896 | Author: 陈正一 | Hits:

[VHDL-FPGA-Verilog] systemcTOVerlogHDL

Description: 一个带波形输出的扫频模板systemC源程序， 该程序在SystemCStudio开发平台下生成， 实现systemC仿真、波形显示以及自动生成Verilog HDL代码。-waveform output with a sweep of the template systemC source, SystemCStudio the program development platform in the next generation, realize systemC simulation, waveform display and automatically generate Verilog HDL code.
Platform: | Size: 460800 | Author: 李义 | Hits:

[VHDL-FPGA-Verilog] div2

Description: 32位除法器 被除数和除数均为16位整数，16位小数 商为32位整数，16位小数 余数为16位整数，16位小数 Verilog HDL 代码-32 divider dividend and divisor are 16-bit integer, decimal 16 for the 32-bit integer, 16-bit decimal number more than 16 integer, 16-bit decimal Verilog HDL code
Platform: | Size: 1024 | Author: 李春阳 | Hits:

[Com Port] uart2iic

Description: UART转I2C的Verilog HDL代码，由北京邮电大学《VerilogHDL设计与EDA技术基础》教师编写-UART to I2C of the Verilog HDL code, by the Beijing University of Posts and Telecommunications VerilogHDL design and EDA technology infrastructure Teacher preparation
Platform: | Size: 3072 | Author: emulous | Hits:

[Com Port] demo_24c01a

Description: 24C01A的Verilog HDL仿真代码，用于I2C接口模块的测试，由北京邮电大学《VerilogHDL设计与EDA技术基础》教师编写-24C01A simulation of Verilog HDL code for the I2C interface module of the test, by the Beijing University of Posts and Telecommunications VerilogHDL design and EDA technology infrastructure Teacher preparation
Platform: | Size: 1024 | Author: emulous | Hits:

[VHDL-FPGA-Verilog] SourceFile

Description: PS2鼠标实验Verilog HDL代码-PS2 mouse experiments Verilog HDL code
Platform: | Size: 4096 | Author: 张猛蛟 | Hits:

[VHDL-FPGA-Verilog] Fusion_UART

Description: UART实验Verilog HDL代码，用于FPGA-UART experimental Verilog HDL code for FPGA
Platform: | Size: 3072 | Author: 张猛蛟 | Hits:

[VHDL-FPGA-Verilog] Source

Description: PWM的Verilog HDL代码用于FPGA-PWM of the Verilog HDL code for FPGA
Platform: | Size: 2048 | Author: 张猛蛟 | Hits:

[VHDL-FPGA-Verilog] verilog

Description: 是几个用Verilog HDL语言编写的源代码（里面包括实现滤波器等），对想学习这个语言的朋友很有帮助！ -Several languages to use Verilog HDL source code (which includes the realization of filters, etc.), to want to learn this language very helpful friend!
Platform: | Size: 14336 | Author: 吴雨彤 | Hits:

[VHDL-FPGA-Verilog] Verilog_sourcecode

Description: 清华大学verilog hdl源码例子，作业，内含源代码，详细的文档说明，非常有用-Tsinghua University, verilog hdl code examples work, containing the source code, detailed documentation, very useful
Platform: | Size: 1061888 | Author: jackie | Hits:

[VHDL-FPGA-Verilog] Verilog-book

Description: 学习Verilog语言必备资料，包括语法总结 编写Verilog HDL 源代码的标准及设计流程-Verilog language learning essential information, including syntax summary of Verilog HDL source code for the preparation of standards and design process
Platform: | Size: 3835904 | Author: shaoyqo | Hits:

[VHDL-FPGA-Verilog] Mars_EP1C6F_Fundermental_demo(Verilog)

Description: FPGA开发板配套Verilog HDL代码。芯片为Mars EP1C6F。是基础实验的源码。包括加法器、减法器、乘法器、多路选择器等。-FPGA development board supporting Verilog HDL code. Chips for the Mars EP1C6F. Are the basic source experiment. Including the adder, subtraction, and multiplier, such as MUX.
Platform: | Size: 1244160 | Author: chenlu | Hits:

[VHDL-FPGA-Verilog] Verilog-HDL-code

Description: verilog 经典例子的源码 非常适用于初学verilog的朋友们-classic example of verilog source code
Platform: | Size: 51200 | Author: 李晨 | Hits:

[Other] i2c.tar

Description: I2C verilog HDL code including test environment
Platform: | Size: 702464 | Author: richman | Hits:

[VHDL-FPGA-Verilog] RAM_Examples

Description: Verilog hdl code for representing ram and rom "memory" using many methods
Platform: | Size: 5120 | Author: Muftah | Hits:

[VHDL-FPGA-Verilog] LVDS-application-Verilog-HDL-code

Description: LVDS的应用的Verilog HDL例子程序-LVDS example of the application procedures for the Verilog HDL
Platform: | Size: 421888 | Author: vico | Hits:

[VHDL-FPGA-Verilog] Advanced-Digital-Design-with-the-Verilog-HDL-CODE.

Description: 《Verilog HDL高级数字系统设计》（Michael D. Ciletti著） Verilog HDL源代码-" Verilog HDL Advanced Digital System Design" (Michael D. Ciletti a) Verilog HDL source code
Platform: | Size: 1070080 | Author: 曹氏 | Hits:

[VHDL-FPGA-Verilog] verilog-HDL-code

Description: Verilog HDL程序设计实例详解的源代码-verilog HDL code
Platform: | Size: 14558208 | Author: suhoo | Hits:

[VHDL-FPGA-Verilog] 《Verilog HDL设计与实战》配套代码(1)

Description: 《Verilog HDL设计与实战》配套代码 verilog源程序(Verilog HDL design and actual combat code Verilog source program)
Platform: | Size: 6552576 | Author: 铭铭扬扬 | Hits:

[source in ebook] 《Verilog HDL设计与实战》配套代码（2）

Description: 《Verilog HDL设计与实战》配套代码 (2)("Verilog HDL design and actual combat" matching code (2))
Platform: | Size: 103367680 | Author: 铭铭扬扬 | Hits:
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